UCIe联盟11月12日发布4.0规范：新增封装内内存连接，数据效率最高93.75%、带宽密度约每毫米2.5TB每秒
UCIe 联盟11月12日发布 UCIe 4.0 规范，把这项芯粒互连标准从裸片之间的连接扩展到系统级集成。4.0 版的 headline 新增项是 UCIe.mem，这是首个标准化的封装内内存连接，定义计算系统级芯片如何与内存逻辑裸片通信，并可使用 HBM 与 LPDDR 等现有内存技术。
联盟公布的数字显示，UCIe.mem 的数据传输效率最高达93.75%，裸片边缘带宽密度约为每毫米2.5 TB每秒。联盟称，这一设计把内存控制从计算侧分离出来，让封装内内存带宽可以按系统与负载需求扩展。
在连接密度与能效方面，4.0 版的协同优化链路配置可把能效提高30%至80%。针对 48 GT/s 与 64 GT/s 的增强型 UCIe-S 凸点映射，可带来约20%的边缘带宽密度提升与约10%的面积带宽密度提升。联盟说明，这些能效数字针对的是裸片间通信链路本身，并不等于整机功耗同比例下降。
安全方面，4.0 版引入芯粒状态可信报告（TRoCs），让封装可通过受完整性保护的双向管理通道报告各裸片状态。规范同时加强了多裸片系统的状态监测与故障通知能力。
UCIe 4.0 与此前所有版本完全向后兼容。规范文本与配套白皮书可通过联盟网站 uciexpress.org 申请获取，白皮书由联盟主席、英特尔的 Debendra Das Sharma 撰写。联盟未在公布材料中给出兼容产品的上市或量产时间。
UCIe Consortium Releases 4.0 Specification on November 12 With On-Package Memory Link at Up to 93.75 Percent Data Efficiency and About 2.5 TB/s/mm Bandwidth Density
The UCIe Consortium released the UCIe 4.0 Specification on November 12, moving the chiplet interconnect standard from die-to-die connectivity toward system-level integration. The headline addition is UCIe.mem, the first standardized on-package memory link between compute dies and memory dies. It defines how systems on chip talk to memory logic dies while using existing memory technologies such as HBM and LPDDR.
Figures published by the consortium put UCIe.mem data transfer efficiency at up to 93.75 percent, with die-edge bandwidth density of approximately 2.5 TB/s/mm. The consortium said the design separates memory control from the compute side, allowing on-package memory bandwidth to scale with system and workload needs.
On connection density and power, co-optimized link profiles in the 4.0 specification deliver 30 to 80 percent greater energy efficiency. The enhanced UCIe-S bump map for 48 GT/s and 64 GT/s provides about 20 percent greater shoreline bandwidth density and about 10 percent greater area bandwidth density. The consortium noted that the efficiency figures apply to the die-to-die communication link itself and do not mean system-wide power consumption falls by the same proportion.
For security, the 4.0 specification introduces Trusted Reporting of Chiplet State, or TRoCs, which lets a package report the state of its dies over integrity-protected two-way management channels. The specification also enhances status monitoring and fault notification across multiple dies.
UCIe 4.0 is fully backward compatible with all previous UCIe specifications. The specification and an accompanying white paper are available by request at uciexpress.org. The white paper was written by Debendra Das Sharma of Intel, chairman of the UCIe Consortium. The announcement materials gave no timing for compatible products or mass production.
来源：UCIe联盟
发布：GSM·美国（发布链接）
图片来源：图：UCIe 封装内内存连接示意图。来源：UCIe 联盟官方发布。 / Photo: Diagram of UCIe on-package memory connectivity. Credit: UCIe Consortium.
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